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Fabrication of conducting Si nanowire arrays

Beckman, R. A. and Johnston-Halperin, E. and Melosh, N. A. and Luo, Y. and Green, J. E. and Heath, J. R. (2004) Fabrication of conducting Si nanowire arrays. Journal of Applied Physics, 96 (10). pp. 5921-5923. ISSN 0021-8979. http://resolver.caltech.edu/CaltechAUTHORS:BECjap04

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Abstract

The recent development of the superlattice nanowire pattern transfer technique allows for the fabrication of arrays of nanowires at a diameter, pitch, aspect ratio, and regularity beyond competing approaches. Here, we report the fabrication of conducting Si nanowire arrays with wire widths and pitches of 10–20 and 40–50 nm, respectively, and resistivity values comparable to the bulk through the selection of appropriate silicon-on-insulator substrates, careful reactive-ion etching, and spin-on glass doping. These results promise the realization of interesting nanoelectronic circuits and devices, including chemical and biological sensors, nanoscale mosaics for electronics, and ultradense field-effect transistor arrays.


Item Type:Article
Additional Information:©2004 American Institute of Physics (Received 11 March 2004; accepted 2 August 2004) This work was supported by the DARPA, the MARCO Materials Structures and Devices Focus Center. The authors would also like to acknowledge Dr. Kris Beverly and Akram Boukai for fabrication assistance.
Subject Keywords:silicon; elemental semiconductors; nanowires; semiconductor superlattices; nanotechnology; electrical resistivity; sputter etching; gallium arsenide; aluminium compounds; III-V semiconductors; ion implantation
Record Number:CaltechAUTHORS:BECjap04
Persistent URL:http://resolver.caltech.edu/CaltechAUTHORS:BECjap04
Alternative URL:http://dx.doi.org/10.1063/1.1801155
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:1239
Collection:CaltechAUTHORS
Deposited By: Archive Administrator
Deposited On:05 Jan 2006
Last Modified:26 Dec 2012 08:43

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