Zahler, James M. and Fontcuberta i Morral, Anna and Ahn, Chang-Geun and Atwater, Harry A. and Wanlass, Mark W. and Chu, Charles and Iles, Peter A. (2002) Wafer bonding and layer transfer processes for 4-junction high efficiency solar cells. In: IEEE Photovoltaic Specialists Conference, 29th (PSC 2002), New Orleans, LA, 29-24 May 2002. IEEE , Piscataway, NJ, pp. 1039-1042. ISBN 0-7803-7471-1 http://resolver.caltech.edu/CaltechAUTHORS:YAHpsc02
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A four-junction cell design consisting of InGaAs, InGeAsP, GaAs, and Ga0.5In0.5P subcells could reach 1 x AMO efficiencies of 35.4%. but relies on the integration of non-lattice-matched materials. Wafer bonding and layer transfer processes show promise in the fabrication of InP/Si epitaxial templates for growth of the bottom InGaAs and InGaAsP subcells on a Si support substrate. Subsequent wafer bonding and layer transfer of a thin Ge layer onto the lower subcell stack can serve as an epitaxial template for GaAs and Ga0.5In0.5P subcelis. Present results indicate that optically active III/V compound semiconductors can be grown on both Ge/Si and InP/Si heterostructures. Current-voltage electrical characterization of the interfaces of these structures indicates that both InP/Si and Ge/Si interfaces have specific resistances lower than 0.1 Ωcm^2 for heavily doped wafer bonded interfaces, enabling back surface power extraction from the finished cell structure.
|Item Type:||Book Section|
|Additional Information:||© Copyright 2002 IEEE. Reprinted with permission. Publication Date: 19-24 May 2002. The authors would like to acknowledge Lynn Gedvilas for measuring the FTPL data and Jeffrey Carapella for performing the MOVPE growths. This work has been supported by NASA and the National Renewable Energy Laboratory.|
|Subject Keywords:||III-V semiconductors; contact resistance; gallium arsenide; gallium compounds; indium compounds; semiconductor device measurement; solar cells; wafer bonding; 4-junction high efficiency solar cells; AM0 efficiency; GaAs; Ge-Si; InGaAs; InGaAsP; InP-Si; back surface power extraction; current voltage electrical characterization; heavily doped wafer bonded interfaces; layer transfer processes; specific resistance|
|Usage Policy:||No commercial reproduction, distribution, display or performance rights in this work are provided.|
|Deposited By:||Kristin Buxton|
|Deposited On:||16 Dec 2008 05:50|
|Last Modified:||26 Dec 2012 10:37|
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