Nagarah, John M. and Paek, Eunsu and Luo, Yi and Wang, Pin and Hwang, Gyeong S. and Heath, James R. (2010) Batch Fabrication of High-Performance Planar Patch-Clamp Devices in Quartz. Advanced Materials, 22 (41). pp. 4622-4627. ISSN 0935-9648 http://resolver.caltech.edu/CaltechAUTHORS:20110310-100121704
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The success of the patch-clamp technique has driven an effort to create wafer-based patch-clamp platforms. We develop a lithographic/electrochemical processing scheme that generates ultrasmooth, high aspect ratio pores in quartz. These devices achieve gigaohm seals in nearly 80% of trials, with the majority exhibiting seal resistances from 20-80 GΩ, competing with pipette-based patch-clamp measurements.
|Additional Information:||© 2010 Wiley. Received: May 14, 2010. Published online: September 9, 2010. This work was funded by the National Cancer Institute grant no. 5U54 CA119347 (J.R.H., P.I.) and by the Institute for Collaborative Biotechnologies through grant DAAD19-03-D-0004 from the US Army Research Office. We thank Rigo Pantoja, Kate Klemic, Jan Behrends, and Fred Sachs for very useful advice and Habib Ahmad for contributions in creating fi gures in this manuscript. We also thank the UCLA Nanoelectronics Research Facility staff, especially Tom Lee and Joe Zendejas, for their support in device fabrication.|
|Subject Keywords:||planar patch-clamp; gigaohm seals; metal masks; reactive ion etching; high aspect ratio pore|
|Official Citation:||Batch Fabrication of High-Performance Planar Patch-Clamp Devices in Quartz (pages 4622–4627) John M. Nagarah, Eunsu Paek, Yi Luo, Pin Wang, Gyeong S. Hwang and James R. Heath Article first published online: 9 SEP 2010 | DOI: 10.1002/adma.201001793|
|Usage Policy:||No commercial reproduction, distribution, display or performance rights in this work are provided.|
|Deposited By:||Ruth Sustaita|
|Deposited On:||11 Mar 2011 16:36|
|Last Modified:||11 Mar 2011 16:36|
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