Buckwalter, James and Hajimiri, Ali (2005) Crosstalk-induced jitter equalization. In: Proceedings of the IEEE 2005 Custom Integrated Circuits Conference. IEEE Custom Integrated Circuits Conference. IEEE , Piscataway, NJ, pp. 409-412. ISBN 0-7803-9023-7 http://resolver.caltech.edu/CaltechAUTHORS:20110517-090627598
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A novel jitter equalization circuit is presented that addresses crosstalk-induced jitter in high-speed communication links. A simplified model of electromagnetic coupling demonstrates the generation of crosstalk-induced jitter. This model suggests an equalizer that compensates for the data-induced electromagnetic coupling between adjacent links. Additionally, a data-dependent jitter equalizer that provides separate adjustments of rising and falling edge deviations is presented. The circuits are implemented using 130 nm MOSFETs and operate at 5-10Gb/s. The results demonstrate reduced deterministic jitter and lower bit-error rate. At 10Gb/s, the crosstalk-induced jitter equalizer opens the eye at BER of 10^(-12) from 17ps to 45ps.
|Item Type:||Book Section|
|Additional Information:||© 2005 IEEE. Issue date Sept 21, 2005. Date of current version January 10, 2005. The authors would like to thank Behnam Analui at Caltech for helpful discussions. The support of IBM for access to 8HP technology and graduate fellowship funding is appreciated. Additionally, we thank the Rogers Corporation for the generous donation of duroid.|
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|Official Citation:||Buckwalter, J.; Hajimiri, A.; , "Crosstalk-induced jitter equalization," Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005 , vol., no., pp.409-412, 21-21 Sept. 2005 doi: 10.1109/CICC.2005.1568692 URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1568692&isnumber=33245|
|Usage Policy:||No commercial reproduction, distribution, display or performance rights in this work are provided.|
|Deposited By:||Ruth Sustaita|
|Deposited On:||18 May 2011 15:23|
|Last Modified:||18 May 2011 15:24|
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