CaltechAUTHORS
  A Caltech Library Service

Novel Design of Three-Dimensional Crossbar for Future Network on Chip based on Post-Silicon Devices

Nomura, Kumiko and DeHon, André and Abe, Keiko and Fujita, Shinobu (2006) Novel Design of Three-Dimensional Crossbar for Future Network on Chip based on Post-Silicon Devices. In: 2006 1st International Conference on Nano-Networks and Workshops. IEEE , Piscataway, NJ, pp. 72-76. ISBN 978-1-4244-0390-5 . http://resolver.caltech.edu/CaltechAUTHORS:20110720-093755059

Full text is not posted in this repository. Consult Related URLs below.

Use this Persistent URL to link to this item: http://resolver.caltech.edu/CaltechAUTHORS:20110720-093755059

Abstract

We present a novel 3D crossbar for future Network-on-a-Chip implementations. We introduce a routing algorithm for the 3D crossbar circuit and detail two specific 3D crossbar topologies. We evaluate the defect tolerance of the 3D crossbar and quantify the number of extra layers required to support arbitrary permutations as a function of the defect rate. Further, we estimate the circuit performance and advantages of the 3D crossbar circuit based on post-silicon devices.


Item Type:Book Section
Related URLs:
URLURL TypeDescription
http://dx.doi.org/10.1109/NANONET.2006.346226 DOIUNSPECIFIED
http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=4152809PublisherUNSPECIFIED
Additional Information:© 2006 IEEE. Issue Date: Sept. 2006. Date of Current Version: 16 April 2007. The authors are grateful to Shinichi YASUDA and Dr. Tetsufumi TANAMOTO, Corporate R&D Center, Toshiba Corp., and Dr. Bipul C Paul and Dr. Masaoki OKAJIMA, Toshiba America Research, Inc., for helpful comments.
Subject Keywords:three-dimensional crossbar; post-Si device; network-on-a-chip
Other Numbering System:
Other Numbering System NameOther Numbering System ID
INSPEC Accession Number9366008
Record Number:CaltechAUTHORS:20110720-093755059
Persistent URL:http://resolver.caltech.edu/CaltechAUTHORS:20110720-093755059
Official Citation:Nomura, K.; Abe, K.; Fujita, S.; Detion, A.; , "Novel Design of Three-Dimensional Crossbar for Future Network on Chip based on Post-Silicon Devices," Nano-Networks and Workshops, 2006. NanoNet '06. 1st International Conference on , vol., no., pp.1-5, Sept. 2006 doi: 10.1109/NANONET.2006.346226 URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=4152809&isnumber=4127587
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:24476
Collection:CaltechAUTHORS
Deposited By: Tony Diaz
Deposited On:21 Jul 2011 18:16
Last Modified:23 Aug 2016 10:03

Repository Staff Only: item control page