Gupta, Rajiv (1987) PS: Polygon Streams: A Distributed Architecture for Incremental Computation Applied to Graphics. California Institute of Technology . (Unpublished) http://resolver.caltech.edu/CaltechCSTR:1987.cs-tr-88-03
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Polygon Streams is a distributed system with multiple processors and strictly local communication. A unique custom VLSI chip that constitutes an independent processing module forms a stage of the PS pipeline. The number of these modules in PS is a variable that is determined by the application. PS features a modular architecture, multi-ported on-chip memory, bit-serial arithmetic, and a pipeline whose computation can be dynamically configured. The PS design closely subscribes to the system characteristics favored by VLSI. The task of scan conversion is very intensive in computation and pixel information access for rendering computer graphics images on raster scan displays. It is very coherent and suitable, however, for forward difference algorithms. The discrete and regular layout of the raster display in conjunction with the largely local effect of a pixel on an image, make rendering amenable to parallel architectures with localized memory and communication. These are precisely the attributes favored by VLSI and typical of PS. A modification of the Digital Differential Analyzer is implemented to Gouraud Shade and depth buffer convex polygons at high speeds. The scan conversion task is distributed over the processors to efficiently subdivide the image space and maximize concurrency of processor operation. A study of the tradeoffs and architectural choices of the PS reveal the merits and deficits of the PS approach in comparison with Pixel-Planes, Super-Buffers, and SLAMS.
|Item Type:||Report or Paper (Technical Report)|
|Group:||Computer Science Technical Reports|
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|Deposited On:||24 Apr 2001|
|Last Modified:||26 Dec 2012 14:02|
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