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Asynchronous Datapaths and the Design of an Asynchronous Adder

Martin, Alain J. (1991) Asynchronous Datapaths and the Design of an Asynchronous Adder. California Institute of Technology . (Unpublished) http://resolver.caltech.edu/CaltechCSTR:1991.cs-tr-91-08

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Use this Persistent URL to link to this item: http://resolver.caltech.edu/CaltechCSTR:1991.cs-tr-91-08

Abstract

This paper presents a general method for designing delay insensitive datapath circuits. Its emphasis is on the formal derivation of a circuit from its specification. We discuss the properties required in a code that is used to transmit data asynchronously, and we introduce such a code. We introduce a general method (in the form of a theorem) for distributing the evaluation of a function over a number of concurrent cells. This method requires that the code be "distributive." We apply the method to the familiar example of a ripple-carry adder, and we give a CMOS implementation of the adder.


Item Type:Report or Paper (Technical Report)
Group:Computer Science Technical Reports
Record Number:CaltechCSTR:1991.cs-tr-91-08
Persistent URL:http://resolver.caltech.edu/CaltechCSTR:1991.cs-tr-91-08
Usage Policy:You are granted permission for individual, educational, research and non-commercial reproduction, distribution, display and performance of this work in any format.
ID Code:26740
Collection:CaltechCSTR
Deposited By: Imported from CaltechCSTR
Deposited On:25 Apr 2001
Last Modified:26 Dec 2012 14:03

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