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Testing Delay-Insensitive Circuits

Hazewindus, Pieter Johannes (1992) Testing Delay-Insensitive Circuits. Computer Science Technical Reports, California Institute of Technology , Pasadena, CA. (Unpublished) http://resolver.caltech.edu/CaltechCSTR:1992.cs-tr-92-14

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Use this Persistent URL to link to this item: http://resolver.caltech.edu/CaltechCSTR:1992.cs-tr-92-14

Abstract

A method is developed to test delay-insensitive circuits, using the single stuck-at fault model. These circuits are synthesized from a high-level specification. Since the circuits are hazard-free by construction, there is no test for hazards in the circuit. Most faults cause the circuit to halt during test, since they cause an acknowledgement not to occur when it should. There are stuck-at faults that do not cause the circuit to halt under any condition. These are stimulating faults; they cause a premature firing of a production rule. For such a stimulating fault to be testable, the premature firing has to be propagated to a primary output. If this is not guaranteed to occur, then one or more test points have to be added to the circuit. Any stuck-at fault is testable, with the possible addition of test points. For combinational delay-insensitive circuits, finding test vectors is reduced to the same problem as for synchronous combinational logic. For sequential circuits, the synthesis method is used to find a test for each fault efficiently, to find the location of the test points, and to find a test that detects all faults in a circuit. The number of test points needed to fully test the circuit is very low, and the size of the additional testing circuitry is small. A test derived with a simple transformation of the handshaking expansion yields high fault coverage. Adding tests for the remaining faults results in a small complete test for the circuit.


Item Type:Report or Paper (Technical Report)
Additional Information:© 1992 Pieter J. Hazewindus, California Institute of Technology. Defended 20 May 1992. Now the fearful trip is done. I have many people to thank for shaping the almost seven years of my stay at Caltech, and its long-awaited completion. The following is but a partial list. Thanks to anyone whom I forgot to mention. I want to express my gratitude to my advisor, Alain Martin, who invented the delay-insensitive synthesis method, and suggested I look into testing for delay insensitive circuits. He has guided the development of my research. His suggestions, comments, and criticisms were invaluable. Thank you very much. My thanks to my thesis committee, Alain Martin, Yaser Abu-Mostafa., Chuck Seitz, Jerry Sussman, and Jan van de Snepscheut, for the time spent reading my thesis, and for suggesting such useful corrections. My thanks to DARPA for funding my research. My thanks to Chuck Seitz, who introduced this mathematician to circuit design. He helped Steve Burns, Andy Fyfe, and me develop a standard-cell route-and-placement system, with which our first chips were designed. This system reduced design time considerably, and was a major step forward toward our proving the practicality of delay-insensitive circuit design. Thanks also for the use of the narrow-pitch pads. My thanks to Mani Chandy, for radically changing my thinking on concurrency and parallel programming. My thanks to Yaser Abu-Mostafa, for being my best teacher at Caltech. I always learned something from his lectures, even when I already knew the material. My thanks to Martin Rem, for his help with preparing me for Caltech, and for his help and support during my studies. My thanks to Steve Burns for t.he many fruitful discussions on circuit design, from the first day until (almost) the last, and for posing the difficult questions that needed to be answered. My thanks to the other graduate students in my research group, Ora.Zen Borkovic, Marcel van der Goot, Tony Lee, Christian Nielsen, and Jose Tierno, for the discussions and suggestions during many group meetings, and for proofreading this thesis. My thanks to my officemates for long periods of absence, which gave me a quiet environment in which to work, and for eventually showing me how to complete the work. My thanks to Rajiv Gupta for his patient ears, for his encouragement, and for his hospitality. My thanks to David Schweizer, who would bristle at being called a bastion of sanity, but who was one for me. He knew where my towel was. My thanks to Andy Fyfe for his early work on the route-and-placement system, for his efforts at coercing I¥IF;X into conforming to Caltech thesis standards, and for his understanding of the vagaries of the computer system. My thanks to Jim Boyk for his music, for his epicurisro, and for all the great conversations. Finally, my thanks to my mother, my father, and my sister, Geertje, for their unwavering support while I took the road less traveled by. They have made all the difference. "The thing you've got to realize", he said, "is that most of these guys, for all their computer wizardry, don't know very much about the English language. Some of them are positively subliterate." - David Leavitt, Equal Affections A special thanks to Dian De Sha, B.A., for diligently proofreading manuscripts, for sharing stories, and for moral support during difficult times. And yes, I know the comma ought to be inside the quotation marks.
Group:Computer Science Technical Reports
Funders:
Funding AgencyGrant Number
Defense Advanced Research Projects Agency (DARPA)UNSPECIFIED
Other Numbering System:
Other Numbering System NameOther Numbering System ID
Computer Science Technical Reports92-14
DOI:10.7907/Z9S180PP
Record Number:CaltechCSTR:1992.cs-tr-92-14
Persistent URL:http://resolver.caltech.edu/CaltechCSTR:1992.cs-tr-92-14
Usage Policy:You are granted permission for individual, educational, research and non-commercial reproduction, distribution, display and performance of this work in any format.
ID Code:26757
Collection:CaltechCSTR
Deposited By: Imported from CaltechCSTR
Deposited On:25 Apr 2001
Last Modified:01 Aug 2017 19:22

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