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Tomorrow's Digital Hardware will be Asynchronous and Verified

Martin, Alain J. (1993) Tomorrow's Digital Hardware will be Asynchronous and Verified. California Institute of Technology . (Unpublished) http://resolver.caltech.edu/CaltechCSTR:1993.cs-tr-93-26

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Use this Persistent URL to link to this item: http://resolver.caltech.edu/CaltechCSTR:1993.cs-tr-93-26

Abstract

Encouraged by the results of almost a decade of research and experimentation, we claim that tomorrow's design methods for digital VLSI will be based on a concurrent programming approach to high-level synthesis, asynchronous techniques, and correctness-preserving program transformations.


Item Type:Report or Paper (Technical Report)
Group:Computer Science Technical Reports
Record Number:CaltechCSTR:1993.cs-tr-93-26
Persistent URL:http://resolver.caltech.edu/CaltechCSTR:1993.cs-tr-93-26
Usage Policy:You are granted permission for individual, educational, research and non-commercial reproduction, distribution, display and performance of this work in any format.
ID Code:26766
Collection:CaltechCSTR
Deposited By: Imported from CaltechCSTR
Deposited On:25 Apr 2001
Last Modified:26 Dec 2012 14:04

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