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A General Approach to Performance Analysis and Optimization of Asynchronous Circuits

Lee, Tak Kwan (1995) A General Approach to Performance Analysis and Optimization of Asynchronous Circuits. California Institute of Technology . (Unpublished) http://resolver.caltech.edu/CaltechCSTR:1995.cs-tr-95-07

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Use this Persistent URL to link to this item: http://resolver.caltech.edu/CaltechCSTR:1995.cs-tr-95-07

Abstract

A systematic approach for evaluating and optimizing the performance of asynchronous VLSI circuits is presented. Index-priority simulation is introduced to efficiently find minimal cycles in the state graph of a given circuit. These minimal cycles are used to determine the causality relationships between all signal transitions in the circuit. Once these relationships are known, the circuit is then modeled as an extended event-rule system, which can be used to describe many circuits, including ones that are inherently disjunctive. An accurate indication of the performance of the circuit is obtained by analytically computing the period of the corresponding extended event-rule system.


Item Type:Report or Paper (Technical Report)
Group:Computer Science Technical Reports
Record Number:CaltechCSTR:1995.cs-tr-95-07
Persistent URL:http://resolver.caltech.edu/CaltechCSTR:1995.cs-tr-95-07
Usage Policy:You are granted permission for individual, educational, research and non-commercial reproduction, distribution, display and performance of this work in any format.
ID Code:26881
Collection:CaltechCSTR
Deposited By: Imported from CaltechCSTR
Deposited On:14 May 2001
Last Modified:26 Dec 2012 14:08

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