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ET^2: A Metric For Time and Energy Efficiency of Computation

Martin, Alain J. and Nyströem, Mika and Penzes, Paul (2001) ET^2: A Metric For Time and Energy Efficiency of Computation. California Institute of Technology , Pasadena, CA. (Unpublished) http://resolver.caltech.edu/CaltechCSTR:2001.007

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Abstract

We investigate an efficiency metric for VLSI computation that includes energy, E, and time, t, in the form E t^2. We apply the metric to CMOS circuits operating outside velocity saturation when energy and delay can be exchanged by adjusting the supply voltage; we prove that under these assumptions, optimal Et^2 implies optimal energy and delay. We give experimental and simulation evidences of the range and limits of the assumptions. We derive several results about sequential, parallel, and pipelined computations optimized for E t^2, including a result about the optimal length of a pipeline. We discuss transistor sizing for optimal Et^2 and show that, for fixed, nonzero execution rates, the optimum is achieved when the sum of the transistor-gate capacitances is twice the sum of the parasitic capacitances-not for minimum transistor sizes. We derive an approximation for E t^n (for arbitrary n) of an optimally sized system that can be computed without actually sizing the transistors; we show that this approximation is accurate. We prove that when multiple, adjustable supply voltages are allowed, the optimal Et^2 for the sequential composition of components is achieved when the supply voltages are adjusted so that the components consume equal power. Finally, we give rules for computing the Et^2 of the sequential and parallel compositions of systems, when the Et^2 of the components are known.


Item Type:Report or Paper (Technical Report)
Additional Information:© 2001 California Institute of Technology. Acknowledgment is due to Karl Papadantonakis, Martin Rem, and Catherine Wong for their comments and criticisms. The research described in this paper was sponsored by the Defense Advanced Research Projects Agency and monitored by the Air Force. Power-Aware Computing is published in 2001
Group:Computer Science Technical Reports
Funders:
Funding AgencyGrant Number
Defense Advanced Research Projects Agency (DARPA)UNSPECIFIED
Subject Keywords:asynchronous vlsi, energy-efficient computation, energy time metric, power, quasi delay-insensitive
DOI:10.7907/Z9K935JZ
Record Number:CaltechCSTR:2001.007
Persistent URL:http://resolver.caltech.edu/CaltechCSTR:2001.007
Usage Policy:You are granted permission for individual, educational, research and non-commercial reproduction, distribution, display and performance of this work in any format.
ID Code:26917
Collection:CaltechCSTR
Deposited By: Imported from CaltechCSTR
Deposited On:12 Dec 2001
Last Modified:07 Mar 2017 17:52

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