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Cost and Performance of VLSI Computing Structures

Mead, Carver A. and Rem, Martin (1978) Cost and Performance of VLSI Computing Structures. California Institute of Technology . (Unpublished) http://resolver.caltech.edu/CaltechCSTR:1978.1584-tr-78

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Use this Persistent URL to link to this item: http://resolver.caltech.edu/CaltechCSTR:1978.1584-tr-78

Abstract

Using VLSI technology, it will soon be possible to implement entire computing systems on one monolithic Silicon chip. What will the nature of such systems be? How will they be designed? What will be their cost and performance? Conducting paths are required for communicating information throughout any integrated system. The length and organization of these communication paths places a lower bound on the area and time required for system operations. Optimal designs can be achieved in only a few of the many alternative structures. Two illustrative systems are analyzed in detail: a RAM based system and an associative system. It is shown that in each case an optimum design is possible, using the area – time product as a cost function


Item Type:Report or Paper (Technical Report)
Group:Computer Science Technical Reports
Record Number:CaltechCSTR:1978.1584-tr-78
Persistent URL:http://resolver.caltech.edu/CaltechCSTR:1978.1584-tr-78
Usage Policy:You are granted permission for individual, educational, research and non-commercial reproduction, distribution, display and performance of this work in any format.
ID Code:27018
Collection:CaltechCSTR
Deposited By: Imported from CaltechCSTR
Deposited On:22 Aug 2002
Last Modified:26 Dec 2012 14:12

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