Ng, H. S. and Lam, K. P. and Tai, W. K. (1995) Analog and VLSI implementation of connectionist network for minimum spanning tree problems. In: Microelectronics and VLSI, 1995 IEEE TENCON. IEEE , Hong Kong, pp. 137-140. ISBN 0-7803-2624-5 http://resolver.caltech.edu/CaltechAUTHORS:20120224-094815033
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Abstract
We describe a connectionist architecture which shows promise in obtaining the global optimal solution to the classical minimum spanning tree problem in a time independent of the problem size. Using commonly available analogue electronic components, a network prototype was found to give the global optimal solution within the microseconds range. Simulation results and limiting factors of the performance of analog and VLSI implementation circuits are discussed.
| Item Type: | Book Section | ||||
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| Additional Information: | © 1995 IEEE. Date of Current Version: 06 August 2002. This work was supported by the Hong Kong Research Grant Council under Grant No. CUHK 58/933 | ||||
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| Record Number: | CaltechAUTHORS:20120224-094815033 | ||||
| Persistent URL: | http://resolver.caltech.edu/CaltechAUTHORS:20120224-094815033 | ||||
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| Official Citation: | Ng, H.S.; Lam, K.P.; Tai, W.K.; , "Analog and VLSI implementation of connectionist network for minimum spanning tree problems," Microelectronics and VLSI, 1995. TENCON '95., IEEE Region 10 International Conference on , vol., no., pp.137-140, 6-10 Nov 1995 doi: 10.1109/TENCON.1995.496356 URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=496356&isnumber=10682 | ||||
| Usage Policy: | No commercial reproduction, distribution, display or performance rights in this work are provided. | ||||
| ID Code: | 29452 | ||||
| Collection: | CaltechAUTHORS | ||||
| Deposited By: | Ruth Sustaita | ||||
| Deposited On: | 24 Feb 2012 19:15 | ||||
| Last Modified: | 26 Dec 2012 14:52 |
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