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Minimum Propagation Delays in VLSI

Mead, Carver and Rem, Martin (1982) Minimum Propagation Delays in VLSI. California Institute of Technology , Pasadena, CA. (Unpublished) http://resolver.caltech.edu/CaltechAUTHORS:20120423-103239364

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Abstract

Conditions are outlined under which propagation delays in VLSI circuits can be achieved that are logarithmic in the wire lengths. These conditions are imposed by area requirements and the velocity of light.


Item Type:Report or Paper (Technical Report)
Related URLs:
URLURL TypeDescription
http://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumber=1051810PublisherUNSPECIFIED
http://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumber=1052104OtherUNSPECIFIED
Additional Information:©IEEE 1982 Published in IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. SC-17, NO. 4 , AUGUST 1982. Manuscript received July 15, 198 L This work was supported by the Office of Naval Research under Contract N00014-76-C-0367 and by the Defense Advanced Research Agency under ARPA order number 3771, and monitored by the Office of Naval Research under Contract N00014-79-C-0597.
Group:Computer Science Technical Reports
Funders:
Funding AgencyGrant Number
Office of Naval ResearchN00014-76-C-0367
Defense Advanced Research Projects Agency (DARPA)ARPA order 3771
Other Numbering System:
Other Numbering System NameOther Numbering System ID
Computer Science Technical Memorandum5001
Record Number:CaltechAUTHORS:20120423-103239364
Persistent URL:http://resolver.caltech.edu/CaltechAUTHORS:20120423-103239364
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:30253
Collection:CaltechCSTR
Deposited By: Kristin Buxton
Deposited On:23 Apr 2012 21:15
Last Modified:26 Dec 2012 15:06

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