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A Comparison of MOS PLAs

Trimberger, Stephen (1982) A Comparison of MOS PLAs. California Institute of Technology , Pasadena, CA. (Unpublished) http://resolver.caltech.edu/CaltechAUTHORS:20120424-143407144

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Abstract

This paper discusses Pl.A designs in three MOS technologies: NMOS, CMOS/SOS and CMOS-Bulk. The purpose of this paper is not to introduce a new and exciting PLA design, nor is it to recommend one fabrication technology over another. Its purpose is to use PLAs as a standard, hopefully familiar layout strategy so that new designers can get a better understanding of the advantages and disadvantages of all three technologies from a designer's viewpoint. It is hoped that this paper will provide more data to those who must select a technology for their integrated circuit fabrication.


Item Type:Report or Paper (Technical Report)
Additional Information:This work was supported in part by the Deep Space Network. Larry Matheney of Synmos, Chuck Seitz of Caltech, and Tom Griswold all contributed greatly to my understanding of CMOS. Don Speck and Pete Hunter laid out the CMOS SOS PLA.
Group:Computer Science Technical Reports
Funders:
Funding AgencyGrant Number
Deep Space NetworkUNSPECIFIED
Other Numbering System:
Other Numbering System NameOther Numbering System ID
Computer Science Technical Memorandum5059
Record Number:CaltechAUTHORS:20120424-143407144
Persistent URL:http://resolver.caltech.edu/CaltechAUTHORS:20120424-143407144
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:30296
Collection:CaltechCSTR
Deposited By: Kristin Buxton
Deposited On:01 May 2012 20:51
Last Modified:26 Dec 2012 15:07

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