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Trade-offs between Instantaneous and Total Capacity in Multi-Cell Flash Memories

En Gad, Eyal and Jiang, Anxiao (Andrew) and Bruck, Jehoshua (2012) Trade-offs between Instantaneous and Total Capacity in Multi-Cell Flash Memories. California Institute of Technology , Pasadena, CA. (Unpublished) http://resolver.caltech.edu/CaltechAUTHORS:20120516-141137208

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Abstract

The limited endurance of flash memories is a major design concern for enterprise storage systems. We propose a method to increase it by using relative (as opposed to fixed) cell levels and by representing the information with Write Asymmetric Memory (WAM) codes. Overall, our new method enables faster writes, improved reliability as well as improved endurance by allowing multiple writes between block erasures. We study the capacity of the new WAM codes with relative levels, where the information is represented by multiset permutations induced by the charge levels, and show that it achieves the capacity of any other WAM codes with the same number of writes. Specifically, we prove that it has the potential to double the total capacity of the memory. Since capacity can be achieved only with cells that have a large number of levels, we propose a new architecture that consists of multi-cells - each an aggregation of a number of floating gate transistors.


Item Type:Report or Paper (Technical Report)
Related URLs:
URLURL TypeDescription
http://www.paradise.caltech.edu/papers/etr115.pdfAuthorUNSPECIFIED
Additional Information:This work was partially supported by an NSF grant ECCS- 0801795 and a BSF grant 2010075. The author would like to acknowledge that Qing Li from Texas A&M University derived Lemmas 1 and 2 independently.
Group:Parallel and Distributed Systems Group
Funders:
Funding AgencyGrant Number
NSFECCS-0801795
Binational Science Foundation (BSF)2010075
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ParadiseETR115
Record Number:CaltechAUTHORS:20120516-141137208
Persistent URL:http://resolver.caltech.edu/CaltechAUTHORS:20120516-141137208
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:31507
Collection:CaltechPARADISE
Deposited By: George Porter
Deposited On:01 Jun 2012 17:14
Last Modified:26 Dec 2012 15:13

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