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Optimum Noise Performance of Transistor Input Circuits / Transistor AC and DC Amplifiers with High Input Impedance

Middlebrook, R. D. and Mead, C. A. (1959) Optimum Noise Performance of Transistor Input Circuits / Transistor AC and DC Amplifiers with High Input Impedance. California Institute of Technology , Pasadena, CA. (Unpublished) http://resolver.caltech.edu/CaltechAUTHORS:20121108-143232418

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Abstract

Some results are presented for optimum noise performance of transistor input stages when fed from resistive or reactive sources. Standard theory has shown that a common-emitter transistor fed from a resistive source presents a minimum noise figure F_m when the source resistance has a certain value R_gm in the order of lkΩ. In this paper, expressions are developed for minimum noise figure and optimum source resistance in the presence of base bias resistors, emitter degeneration resistance, and various kinds of feedback. Results are in terms of F_m and R_gm only, and do not contain other functions of the transistor internal noise sources. It is shown that the minimum noise figure is never less than F_m, but the optimum source resistance can be either greater or less than R_gm. In the case of reactive sources, noise figure is meaningless and the quantity of interest is signal-to-noise ratio over the passband. It is shown that for an inductive source, such as a magnetic tape head, there is a maximum signal-to-noise ratio obtainable with an optimum source inductance, and that a Figure of Merit can be assigned to the source which is independent of its inductance. Experimental results presented for both resistive and inductive sources show good agreement with the theoretical predictions.


Item Type:Report or Paper (Technical Report)
Additional Information:Optimum Noise Performance of Transistor Input Circuits Presented at the Philadelphia Transistor and Solid State Circuits Conference, February 1958. Published in Semiconductbr Products, July/August, 1958. Transistor AC and DC Amplifiers with High Input Impedance Published in Semiconductor Products, March 1959. Part of this material is based on work performed for Westrex Corporation, Hollywood, California, and is reported by permission of Westrex Corporation. The author also wishes to thank A. G. D1 Loreto and T. C. Sorensen, of the California Institute of Technology, who performed the experimental measurements, and the Alectra Division of Consolidated Electrodynamics Corporation, Pasadena, California, for their kind loan of a true rms voltmeter. The authors wish to thank A. G. DiLoreto, T. C. Sorensen, and W. T. McDonald, of the California Institute of Technology, for their help with the experimental measurements. Patents covering many of the circuits have been applied for by the California Institute of Technology.
Record Number:CaltechAUTHORS:20121108-143232418
Persistent URL:http://resolver.caltech.edu/CaltechAUTHORS:20121108-143232418
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:35371
Collection:CaltechAUTHORS
Deposited By: Kristin Buxton
Deposited On:09 Nov 2012 22:40
Last Modified:27 Dec 2012 02:59

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