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Codes for Network Switches

Wang, Zhiying and Shaked, Omer and Cassuto, Yuval and Bruck, Jehoshua (2013) Codes for Network Switches. California Institute of Technology , Pasadena, CA. (Unpublished) http://resolver.caltech.edu/CaltechAUTHORS:20130128-153803180

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Abstract

A network switch routes data packets between its multiple input and output ports. Packets from input ports are stored upon arrival in a switch fabric comprising multiple memory banks. This can result in memory contention when distinct output ports request packets from the same memory bank, resulting in a degraded switching bandwidth. To solve this problem, we propose to add redundant memory banks for storing the incoming packets. The problem we address is how to minimize the number of redundant memory banks given some guaranteed contention resolution capability. We present constructions of new switch memory architectures based on different coding techniques. The codes allow decreasing the redundancy by 1/2 or 2/3, depending on the request specifications, compared to non-coding solutions.


Item Type:Report or Paper (Technical Report)
Related URLs:
URLURL TypeDescription
http://www.paradise.caltech.edu/papers/etr118.pdfAuthorTechnical Report
Group:Parallel and Distributed Systems Group
Record Number:CaltechAUTHORS:20130128-153803180
Persistent URL:http://resolver.caltech.edu/CaltechAUTHORS:20130128-153803180
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:36634
Collection:CaltechPARADISE
Deposited By: Kristin Buxton
Deposited On:30 Jan 2013 23:58
Last Modified:18 Apr 2017 21:37

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