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Saliency on a chip: a digital approach with an FPGA

Kapre, Nachiket and Walther, Dirk B. and Koch, Christof and DeHon, André (2004) Saliency on a chip: a digital approach with an FPGA. The Neuromorphic Engineer, 1 (2). pp. 9-11. ISSN 1548-5625. http://resolver.caltech.edu/CaltechAUTHORS:20130816-103300863

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Abstract

Selective-visual-attention algorithms have been successfully implemented in analog VLSI circuits.1 However, in addition to the usual issues of analog VLSI—such as the need to fi ne-tune a large number of biases— these implementations lack the spatial resolution and pre-processing capabilities to be truly useful for image-processing applications. Here we take an alternative approach and implement a neuro-mimetic algorithm for selective visual attention in digital hardware.


Item Type:Article
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http://www.ine-web.org/PublisherPublisher's website
Additional Information:Volume 1, Issue 2, Autumn 2004.
Group:Koch Laboratory, KLAB
Record Number:CaltechAUTHORS:20130816-103300863
Persistent URL:http://resolver.caltech.edu/CaltechAUTHORS:20130816-103300863
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:40606
Collection:CaltechAUTHORS
Deposited By: KLAB Import
Deposited On:16 Jan 2008 02:42
Last Modified:18 Sep 2013 19:43

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