Mead, Carver A. and Rem, Martin (1981) Cost and Performance of VLSI Computing Structures. In: Digital MOS integrated circuits. IEEE Press , New York, pp. 196-203. ISBN 0879421517 http://resolver.caltech.edu/CaltechAUTHORS:20150223-143648166
- Published Version
See Usage Policy.
Use this Persistent URL to link to this item: http://resolver.caltech.edu/CaltechAUTHORS:20150223-143648166
Using VLSI technology, it will soon be possible to implement entire computing systems on one monolithic silicon chip. Conducting paths are required for communicating information throughout any integrated system. The length and organization of these communication paths place a lower bound on the area and time required for system operations. Optimal designs can be achieved in only a few of the many alternative structures. Two illustrative systems are analyzed in detail: a RAM-based system and an associative system. It is shown that in each case an optimum design is possible using the area-time product as a cost function.
|Item Type:||Book Section|
|Additional Information:||© 1981 IEEE Press. Reprinted from IEEE J. Solid-State Circuits, vol. SC-14, pp. 455-462, Apr. 1979. Manuscript received September 18, 1978; revised January 10, 1979. This work was supported in part by BMD under Contract DASG60-77-C-0097, and the Office of Naval Research under Contract N00014-16-C-0367. (California Institute of Technology, Computer Science Department Contribution 1584.)|
|Other Numbering System:|
|Usage Policy:||No commercial reproduction, distribution, display or performance rights in this work are provided.|
|Deposited By:||Kristin Buxton|
|Deposited On:||23 Feb 2015 22:41|
|Last Modified:||23 Feb 2015 22:47|
Repository Staff Only: item control page