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Method for fabricating vertically-offset interdigitated comb actuator device

Choo, Hyuck and Garmire, David and Muller, Richard S. and Demmel, James (2009) Method for fabricating vertically-offset interdigitated comb actuator device. Patent number: US 7,573,022. http://resolver.caltech.edu/CaltechAUTHORS:20151104-153631368

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Abstract

The present invention relates to systems and methods for fabricating microscanners. The fabrication processes employed pursuant to some embodiments are compatible with well known CMOS fabrication techniques, allowing devices for control, monitoring and/or sensing to be integrated onto a single chip. Both one- and two-dimensional microscanners are described. Applications including optical laser surgery, maskless photolithography, portable displays and large scale displays are described.


Item Type:Patent
Related Patents:US20070026614, WO2007016111A2, WO2007016111A3
Patent Classification:U.S. Classification: 250/234, 257/415, 359/198.1. International Classification: G02B26/08, H01L29/78, H01J3/14. Cooperative Classification: G02B26/0841. European Classification: G02B26/08M4E.
Patent Assignee:Regents of the University of California
Related URLs:
URLURL TypeDescription
https://www.google.com/patents/US7573022?dq=7,573,022PatentGoogle Patents site
http://patft.uspto.gov/netacgi/nph-Parser?Sect2=PTO1&Sect2=HITOFF&p=1&u=/netahtml/PTO/search-bool.html&r=1&f=G&l=50&d=PALL&RefSrch=yes&Query=PN/7573022PatentU.S. Patent Office
http://worldwide.espacenet.com/publicationDetails/biblio?CC=US&NR=7573022B2&KC=B2&FT=DPatentEspacenet (European Patent Office)
ORCID:
AuthorORCID
Choo, Hyuck0000-0002-8903-7939
Alternate Title:CMOS-compatible high-performance microscanners, including structures, high-yield simplified fabrication methods and applications
Additional Information:Publication number: US7573022 B2. Publication type: Grant. Application number: US 11/492,270. Publication date: Aug 11, 2009. Application publication date: Feb. 1, 2007. Filing date: Jul 25, 2006. Priority date: Jul 27, 2005. Government interests: This invention was made with Government support under NSF Grant Nos. EIA-0122599 and EEC-0318642. The Government has certain rights to this invention. Parent case: This application claims the benefit of priority from U.S. provisional patent application No. 60/793,424, filed Apr. 19, 2006, the entirety of which is incorporated herein by reference. Application title: CMOS-compatible high-performance microscanners, including structures, high-yield simplified fabrication methods and applications.
Record Number:CaltechAUTHORS:20151104-153631368
Persistent URL:http://resolver.caltech.edu/CaltechAUTHORS:20151104-153631368
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:61855
Collection:CaltechAUTHORS
Deposited By: Katherine Johnson
Deposited On:05 Nov 2015 00:04
Last Modified:08 May 2017 23:09

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