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An Adaptive WTA using Floating Gate Technology

Kruger, W. Fritz and Hasler, Paul and Minch, Bradley A. and Koch, Christof (1997) An Adaptive WTA using Floating Gate Technology. In: Advances in Neural Information Processing Systems 9 (NIPS 1996). Advances in Neural Information Processing Systems. No.9. MIT Press , Cambridge, MA, pp. 720-726. ISBN 0-262-10065-7 http://resolver.caltech.edu/CaltechAUTHORS:20160223-161112244

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Abstract

We have designed, fabricated, and tested an adaptive Winner-Take-All (WTA) circuit based upon the classic WTA of Lazzaro, et al [1]. We have added a time dimension (adaptation) to this circuit to make the input derivative an important factor in winner selection. To accomplish this, we have modified the classic WTA circuit by adding floating gate transistors which slowly null their inputs over time. We present a simplified analysis and experimental data of this adaptive WTA fabricated in a standard CMOS 2µm process.


Item Type:Book Section
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http://papers.nips.cc/paper/1205-an-adaptive-wta-using-floating-gate-technologyOrganizationPaper
ORCID:
AuthorORCID
Koch, Christof0000-0001-6482-8067
Additional Information:© 1997 Massachusetts Institute of Technology.
Group:Koch Laboratory, KLAB
Record Number:CaltechAUTHORS:20160223-161112244
Persistent URL:http://resolver.caltech.edu/CaltechAUTHORS:20160223-161112244
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:64695
Collection:CaltechAUTHORS
Deposited By: Kristin Buxton
Deposited On:24 Feb 2016 00:16
Last Modified:24 Feb 2016 00:16

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