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Fractal capacitors

Samavati, Hirad and Hajimiri, Ali and Shahani, Arvin R. and Nasserbakht, Gitty N. and Lee, Thomas H. (1998) Fractal capacitors. IEEE Journal of Solid-State Circuits, 33 (12). pp. 2035-2041. ISSN 0018-9200. http://resolver.caltech.edu/CaltechAUTHORS:SAMieeejssc98

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Abstract

A linear capacitor structure using fractal geometries is described. This capacitor exploits both lateral and vertical electric fields to increase the capacitance per unit area. Compared to standard parallel-plate capacitors, the parasitic bottom-plate capacitance is reduced. Unlike conventional metal-to-metal capacitors, the capacitance density increases with technology scaling. A classic fractal structure is implemented with 0.6-μm metal spacing, and a factor of 2.3 increase in the capacitance per unit area is observed. It is shown that capacitance boost factors in excess of ten may be possible as technology continues to scale. A computer-aided-design tool to automatically generate and analyze custom fractal layouts has been developed.


Item Type:Article
Additional Information:© Copyright 1998 IEEE. Reprinted with permission. Manuscript received April 10, 1998; revised July 15, 1998. The authors would like to acknowledge D. K. Shaeffer and H. Rategh for helpful discussions.
Record Number:CaltechAUTHORS:SAMieeejssc98
Persistent URL:http://resolver.caltech.edu/CaltechAUTHORS:SAMieeejssc98
Alternative URL:http://dx.doi.org/10.1109/4.735545
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:6777
Collection:CaltechAUTHORS
Deposited By: Archive Administrator
Deposited On:21 Dec 2006
Last Modified:26 Dec 2012 09:24

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