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A Fully Integrated, Dual Channel, Flip Chip Packaged 113 GHz Transceiver in 28nm CMOS supporting an 80 Gb/s Wireless Link

Townley, Andrew and Baniasadi, Nima and Krishnamurthy, Sashank and Sideris, Constantine and Hajimiri, Ali and Alon, Elad and Niknejad, Ali (2020) A Fully Integrated, Dual Channel, Flip Chip Packaged 113 GHz Transceiver in 28nm CMOS supporting an 80 Gb/s Wireless Link. In: 2020 IEEE Custom Integrated Circuits Conference (CICC). IEEE , Piscataway, NJ, pp. 1-4. ISBN 9781728160313. https://resolver.caltech.edu/CaltechAUTHORS:20200430-152742107

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Abstract

In order to meet the demand for increasingly higher data rate wireless links, broad-bandwidth transceivers that support high-spectral-efficiency modulation schemes are required. In this paper, a mm-wave transceiver IC operating at 113GHz is demonstrated, achieving a single-channel data rate of 80Gb/s. The transceiver achieves a high level of integration, including LO generation circuitry, a bits-to-RF TX DAC, and two transceiver channels for polarization diversity. The chip is flip-chip packaged onto a PCB with two orthogonally polarized antennas.


Item Type:Book Section
Related URLs:
URLURL TypeDescription
https://doi.org/10.1109/cicc48029.2020.9075890DOIArticle
ORCID:
AuthorORCID
Sideris, Constantine0000-0002-3042-4889
Hajimiri, Ali0000-0001-6736-8019
Additional Information:© 2020 IEEE. This work was supported in part by the ComSenTer research center, under the JUMP program, a Semiconductor Research Corporation program sponsored by DARPA. The authors would also like to acknowledge TSMC for chip fabrication, Integrand Software for EMX electromagnetic simulation. Many thanks to Cyril Luxey and Diane Titz of University of Nice Sophia Antipolis for many helpful discussions regarding the antenna design. Finally, the authors would like to thank the BWRC sponsors, students, and staff.
Funders:
Funding AgencyGrant Number
Defense Advanced Research Projects Agency (DARPA)UNSPECIFIED
Record Number:CaltechAUTHORS:20200430-152742107
Persistent URL:https://resolver.caltech.edu/CaltechAUTHORS:20200430-152742107
Official Citation:A. Townley et al., "A Fully Integrated, Dual Channel, Flip Chip Packaged 113 GHz Transceiver in 28nm CMOS supporting an 80 Gb/s Wireless Link," 2020 IEEE Custom Integrated Circuits Conference (CICC), Boston, MA, USA, 2020, pp. 1-4.
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:102953
Collection:CaltechAUTHORS
Deposited By: George Porter
Deposited On:01 May 2020 14:59
Last Modified:01 May 2020 14:59

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