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A 90 nm CMOS 16 Gb/s Transceiver for Optical Interconnects

Palermo, Samuel and Emami-Neyestanak, Azita and Horowitz, Mark (2008) A 90 nm CMOS 16 Gb/s Transceiver for Optical Interconnects. IEEE Journal of Solid-State Circuits, 43 (5). pp. 1235-1246. ISSN 0018-9200. http://resolver.caltech.edu/CaltechAUTHORS:PALieeejssc08

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Abstract

Interconnect architectures which leverage high-bandwidth optical channels offer a promising solution to address the increasing chip-to-chip I/O bandwidth demands. This paper describes a dense, high-speed, and low-power CMOS optical interconnect transceiver architecture. Vertical-cavity surface-emitting laser (VCSEL) data rate is extended for a given average current and corresponding reliability level with a four-tap current summing FIR transmitter. A low-voltage integrating and double-sampling optical receiver front-end provides adequate sensitivity in a power efficient manner by avoiding linear high-gain elements common in conventional transimpedance-amplifier (TIA) receivers. Clock recovery is performed with a dual-loop architecture which employs baud-rate phase detection and feedback interpolation to achieve reduced power consumption, while high-precision phase spacing is ensured at both the transmitter and receiver through adjustable delay clock buffers. A prototype chip fabricated in 1 V 90 nm CMOS achieves 16 Gb/s operation while consuming 129 mW and occupying 0.105 mm^2.


Item Type:Article
ORCID:
AuthorORCID
Emami-Neyestanak, Azita0000-0003-2608-9691
Additional Information:© 2008 IEEE. Reprinted with permission. Manuscript received October 11, 2007; revised January 17, 2008. [Posted online: 2008-04-22] This work was supported by MARCO-IFC. Chip fabrication was provided by CMP and STMicroelectronics. The authors would like to acknowledge the help and support of D. Patil, B. Nezamfar, P. Chiang, and B. Gupta, CMP and STMicroelectronics for chip fabrication, ULM photonics for VCSELs, Albis Optoelectronics for photodiodes, and MARCO-IFC for funding. In addition, they would like to thank Prof. D. Miller and his research group for testing assistance. S. Palermo thanks Sh. Palermo for constant help and support.
Funders:
Funding AgencyGrant Number
Microelectronics Advanced Research Corporation (MARCO)UNSPECIFIED
Subject Keywords:Clock and data recovery, equalization, laser driver, optical interconnects, optical receiver, serial transceiver, VCSEL
Issue or Number:5
Record Number:CaltechAUTHORS:PALieeejssc08
Persistent URL:http://resolver.caltech.edu/CaltechAUTHORS:PALieeejssc08
Alternative URL:http://dx.doi.org/10.1109/JSSC.2008.920330
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:10542
Collection:CaltechAUTHORS
Deposited By: Archive Administrator
Deposited On:16 May 2008
Last Modified:31 Jan 2019 23:43

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