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A 60-Gb/s PAM4 Wireline Receiver With 2-Tap Direct Decision Feedback Equalization Employing Track-and-Regenerate Slicers in 28-nm CMOS

Chen, Kuan-Chang and Kuo, William Wei-Ting and Emami, Azita (2020) A 60-Gb/s PAM4 Wireline Receiver With 2-Tap Direct Decision Feedback Equalization Employing Track-and-Regenerate Slicers in 28-nm CMOS. IEEE Journal of Solid-State Circuits . ISSN 0018-9200. (In Press)

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This article describes a 4-level pulse amplitude modulation (PAM4) receiver incorporating continuous time linear equalizers (CTLEs) and a 2-tap direct decision feedback equalizer (DFE) for applications in wireline communication. A CMOS track-and-regenerate slicer is proposed and employed in the PAM4 receiver. The proposed slicer is designed for the purposes of improving the clock-to-Q delay as well as the output signal swing. A direct DFE in a PAM4 receiver is made possible with the proposed slicer by having rail-to-rail digital feedback signals available with reduced delay, and accordingly relaxing the settling time constraint of the summer. With the 2-tap direct DFE enabled by the proposed slicer, loop-unrolling and inductor-based bandwidth enhancement techniques, which can be area/power intensive, are not necessary at high data rates. The PAM4 receiver fabricated in 28-nm CMOS technology achieves bit-error-rate (BER) better than 1E-12, and energy efficiency of 1.1 pJ/b at 60 Gb/s, measured over a channel with 8.2-dB loss at Nyquist.

Item Type:Article
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URLURL TypeDescription ItemConference Paper
Chen, Kuan-Chang0000-0003-2968-4656
Emami, Azita0000-0002-6945-9958
Additional Information:© 2020 IEEE. Manuscript received June 2, 2020; revised August 8, 2020; accepted September 6, 2020. This article was approved by Guest Editor Qun Jane Gu. The authors thank D. A. Nelson of Rockley Photonics, Caltech MICS Lab members, with special thanks to Arian Hashemi Talkhooncheh, Saransh Sharma, Fatemeh Aghlmand, and Caltech CHIC Lab for sharing testing resources.
Group:Heritage Medical Research Institute
Subject Keywords:Comparator, decision-feedback equalizer (DFE), equalization, 4-level pulse amplitude modulation (PAM4), receiver, slicer, wireline
Record Number:CaltechAUTHORS:20201008-083808739
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Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:105911
Deposited By: George Porter
Deposited On:08 Oct 2020 17:08
Last Modified:08 Oct 2020 17:08

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