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Proof of concept for through silicon vias in application-specific integrated circuits for hard x-ray imaging detectors

Hong, Jaesub and Grindlay, Jonathan and Allen, Branden and Violette, Daniel P. and Miyasaka, Hiromasa and Malta, Dean and Ovental, Jennifer and Bordelon, David and Richter, Daniel (2021) Proof of concept for through silicon vias in application-specific integrated circuits for hard x-ray imaging detectors. Journal of Astronomical Telescopes, Instruments, and Systems, 7 (2). Art. No. 026001. ISSN 2329-4221. doi:10.1117/1.JATIS.7.2.026001. https://resolver.caltech.edu/CaltechAUTHORS:20210318-162735516

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Abstract

Application-specific integrated circuits (ASICs) are commonly used to efficiently process the signals from sensors and detectors in space. Wire bonding is a space-qualified technique of making interconnections between ASICs and their substrate packaging board for power, control, and readout of the ASICs. Wire bonding is nearly ubiquitous in modern space programs, but their exposed wires can be prone to damage during assembly and subject to electric interference during operations. Additional space around the ASICs needed for wire bonding also impedes efficient packaging of large arrays of detectors. Here, we introduce the through silicon vias (TSV) technology that replaces wire bonds and eliminates their shortcomings. We have successfully demonstrated the feasibility of implementing TSVs to existing ASIC wafers (a.k.a. a via-last process) developed for processing the x-ray signals from the x-ray imaging CdZnTe detectors on the Nuclear Spectroscopic Telescope Array small explorer telescope mission that was launched in 2012. While TSVs are common in the semiconductor industry, this is the first (to our knowledge) successful application for astrophysics imaging instrumentation. We expect that the TSV technology will simplify the detector assembly and thus will enable significant cost and schedule savings in assembly of large area CdZnTe detectors.


Item Type:Article
Related URLs:
URLURL TypeDescription
https://doi.org/10.1117/1.JATIS.7.2.026001DOIArticle
https://arxiv.org/abs/2103.08749arXivDiscussion Paper
ORCID:
AuthorORCID
Hong, Jaesub0000-0002-6089-5390
Grindlay, Jonathan0000-0002-1323-5314
Miyasaka, Hiromasa0000-0002-8074-4186
Additional Information:© 2021 Society of Photo-Optical Instrumentation Engineers (SPIE). Paper 20186 received Dec. 22, 2020; accepted for publication Mar. 12, 2021; published online Apr. 9, 2021. This work was supported by NASA APRA Grant No. NNX17AE62G.
Group:Space Radiation Laboratory
Funders:
Funding AgencyGrant Number
NASANNX17AE62G
Subject Keywords:application-specific integrated circuits; x-ray; CdZnTe detectors; wire bond; through silicon vias
Issue or Number:2
DOI:10.1117/1.JATIS.7.2.026001
Record Number:CaltechAUTHORS:20210318-162735516
Persistent URL:https://resolver.caltech.edu/CaltechAUTHORS:20210318-162735516
Official Citation:Jaesub E. Hong, Jonathan E. Grindlay, Branden E. Allen, Daniel E. Violette, Hiromasa Miyasaka, Dean M. Malta, Jennifer Ovental, David Bordelon, and Daniel Richter "Proof of concept for through silicon vias in application-specific integrated circuits for hard x-ray imaging detectors," Journal of Astronomical Telescopes, Instruments, and Systems 7(2), 026001 (9 April 2021). https://doi.org/10.1117/1.JATIS.7.2.026001
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:108496
Collection:CaltechAUTHORS
Deposited By: Tony Diaz
Deposited On:24 Mar 2021 21:39
Last Modified:24 Aug 2021 17:04

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