The reliability of single-error protected computer memories

Blaum, Mario and Goodman, Rodney and McEliece, Robert (1988) The reliability of single-error protected computer memories. IEEE Transactions on Computers, 37 (1). pp. 114-119. ISSN 0018-9340. https://resolver.caltech.edu/CaltechAUTHORS:BLAieeetc88

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Abstract

The lifetimes of computer memories which are protected with single-error-correcting-double-error-detecting (SEC-DED) codes are studies. The authors assume that there are five possible types of memory chip failure (single-cell, row, column, row-column and whole chip), and, after making a simplifying assumption (the Poisson assumption), have substantiated that experimentally. A simple closed-form expression is derived for the system reliability function. Using this formula and chip reliability data taken from published tables, it is possible to compute the mean time to failure for realistic memory systems.

Item Type:

Article

Related URLs:

URL	URL Type	Description
http://dx.doi.org/10.1109/12.75143	DOI	Article
http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=2498&arnumber=75143	Publisher	Article

Additional Information:

© 1988 IEEE. Reprinted with permission. Manuscript received June 5, 1984; revised June 10, 1985. R. Goodman was supported by Caltech’s Program in Advanced Technologies, sponsored by Aerojet General, General Motors, GTE, and TRW. R. McEliece was supported by a grant from IBM.

Funders:

Funding Agency	Grant Number
Caltech’s Program in Advanced Technologies	UNSPECIFIED
Aerojet General	UNSPECIFIED
General Motors	UNSPECIFIED
GTE	UNSPECIFIED
TRW	UNSPECIFIED
IBM	UNSPECIFIED

Subject Keywords:

Error-correcting codes, RAM’S, reliability, SEC-DED codes, semiconductor memory systems

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CaltechAUTHORS:BLAieeetc88

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https://resolver.caltech.edu/CaltechAUTHORS:BLAieeetc88

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11263

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CaltechAUTHORS

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Deposited On:

28 Jul 2008 23:00

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03 Oct 2019 00:17

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