Aparicio, Roberto and Hajimiri, Ali (2002) A CMOS differential noise-shifting Colpitts VCO. In: IEEE International Solid-State Circuits Conference, Digest of Technical Papers. ISSCC 2002, San Francisco, CA, 3-7 February 2002. IEEE , Piscataway, NJ. ISBN 0-7803-7335-9. https://resolver.caltech.edu/CaltechAUTHORS:APAisscc02
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Abstract
A 0.35 μm VCO uses current switching to increase voltage swing, lower phase noise by cyclostationary noise alignment, and improve startup reliability. A CMOS VCO in a 3-metal, 0.35 μm process has -139 dBc/Hz phase noise at 3 MHz offset from a 1.8 GHz carrier and 30% of continuous tuning using inductors with Q of 6 and 4 mA dc current.
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| Additional Information: | © Copyright 2002 IEEE. Reprinted with permission. Publication Date: 3-7 Feb. 2002. Digest on pages: 288 - 289 vol. 1. Visuals supplement on pages: 226-484 vol. 2. Date Published in Issue: 2002-08-07. | |||||||||
| Subject Keywords: | CMOS analogue integrated circuits; UHF integrated circuits; UHF oscillators; circuit tuning; integrated circuit noise; integrated circuit reliability; phase noise; voltage-controlled oscillators; CMOS differential noise-shifting Colpitts VCO; DC current; Q-factor; current switching; cyclostationary noise alignment; inductor phase noise; startup reliability; tuning range; voltage swing | |||||||||
| DOI: | 10.1109/ISSCC.2002.993045 | |||||||||
| Record Number: | CaltechAUTHORS:APAisscc02 | |||||||||
| Persistent URL: | https://resolver.caltech.edu/CaltechAUTHORS:APAisscc02 | |||||||||
| Usage Policy: | No commercial reproduction, distribution, display or performance rights in this work are provided. | |||||||||
| ID Code: | 11475 | |||||||||
| Collection: | CaltechAUTHORS | |||||||||
| Deposited By: | Kristin Buxton | |||||||||
| Deposited On: | 29 Aug 2008 05:52 | |||||||||
| Last Modified: | 08 Nov 2021 21:59 |
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