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Testing station for fast screening of through silicon via-enabled application-specific integrated circuits for hard x-ray imaging detectors

Violette, Daniel P. and Allen, Branden and Hong, Jaesub and Miyasaka, Hiromasa and Grindlay, Jonathan (2022) Testing station for fast screening of through silicon via-enabled application-specific integrated circuits for hard x-ray imaging detectors. Journal of Astronomical Telescopes, Instruments, and Systems, 8 (3). Art. No. 036001. ISSN 2329-4124. doi:10.1117/1.jatis.8.3.036001. https://resolver.caltech.edu/CaltechAUTHORS:20220712-143407000

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Abstract

Application-specific integrated circuits (ASICs) are used in space-borne instruments for signal processing and detector readout. The electrical interface of these ASICs to frontend printed circuit boards is commonly accomplished with wire bonds. Through silicon via (TSV) technology has been proposed as an alternative interconnect technique that will reduce assembly complexity of ASIC packaging by replacing wire bonding with flip-chip bonding. TSV technology is advantageous in large detector arrays where TSVs enable close detector tiling on all sides. Wafer-level probe card testing of TSV ASICs is frustrated by solder balls introduced onto the ASIC surface for flip-chip bonding that hamper alignment. Therefore, we developed the ASIC test stand (ATS) to enable rapid screening and characterization of individual ASIC die. We successfully demonstrated ATS operation on ASICs originally developed for CdZnTe detectors on the Nuclear Spectroscopic and Telescope Array (NuSTAR) mission that were later modified with TSVs in a via-last process. We tested both backside blind-TSVs and frontside through-TSVs, with results from internal test pulser measurements that demonstrate performance equal to or exceeding the probe card wafer-level testing data. The ATS can easily be expanded or duplicated to parallelize ASIC screening for large area imaging detectors of future space programs.


Item Type:Article
Related URLs:
URLURL TypeDescription
https://doi.org/10.1117/1.JATIS.8.3.036001DOIArticle
https://arxiv.org/abs/2204.01864arXivDiscussion Paper
ORCID:
AuthorORCID
Hong, Jaesub0000-0002-6089-5390
Miyasaka, Hiromasa0000-0002-8074-4186
Grindlay, Jonathan0000-0002-1323-5314
Alternate Title:Testing Station for Fast Screening of Through Silicon Via (TSV)-enabled Application Specific Integrated Circuits (ASICs) for Hard X-ray Imaging Detectors
Additional Information:© 2022 Society of Photo-Optical Instrumentation Engineers (SPIE). Received: 2 March 2022; Accepted: 17 June 2022; Published: 4 July 2022. We would like to thank AlphaTest Corp. for their cooperation in helping design and manufacture the micropogo probes and probe socket and mounting it onto our ATS test board. We would like to thank Micross AIT for their continued support on developing frontside through NuASICs. DPV is grateful to MA and KV for useful advice. This work was supported by NASA APRA grant NNX17AE62G. DPV was supported by the NASA FINESST Fellowship 80NSSC20K1537.
Funders:
Funding AgencyGrant Number
NASANNX17AE62G
NASA Earth and Space Science Fellowship80NSSC20K1537
Subject Keywords:application-specific integrated circuits; x-ray; CdZnTe detectors; wire bond; through silicon vias
Issue or Number:3
DOI:10.1117/1.jatis.8.3.036001
Record Number:CaltechAUTHORS:20220712-143407000
Persistent URL:https://resolver.caltech.edu/CaltechAUTHORS:20220712-143407000
Official Citation:Daniel P. Violette, Branden E. Allen, Jaesub Hong, Hiromasa Miyasaka, and Jonathan E. Grindlay "Testing station for fast screening of through silicon via-enabled application-specific integrated circuits for hard x-ray imaging detectors," Journal of Astronomical Telescopes, Instruments, and Systems 8(3), 036001 (4 July 2022). https://doi.org/10.1117/1.JATIS.8.3.036001
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:115498
Collection:CaltechAUTHORS
Deposited By: George Porter
Deposited On:13 Jul 2022 19:29
Last Modified:13 Jul 2022 19:29

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