A Caltech Library Service

Fully integrated CMOS power amplifier design using the distributed active-transformer architecture

Aoki, Ichiro and Kee, Scott D. and Rutledge, David B. and Hajimiri, Ali (2002) Fully integrated CMOS power amplifier design using the distributed active-transformer architecture. IEEE Journal of Solid-State Circuits, 37 (3). pp. 371-383. ISSN 0018-9200. doi:10.1109/4.987090.

See Usage Policy.


Use this Persistent URL to link to this item:


A novel on-chip impedance matching and power-combining method, the distributed active transformer is presented. It combines several low-voltage push-pull amplifiers efficiently with their outputs in series to produce a larger output power while maintaining a 50-Ω match. It also uses virtual ac grounds and magnetic couplings extensively to eliminate the need for any off-chip component, such as tuned bonding wires or external inductors. Furthermore, it desensitizes the operation of the amplifier to the inductance of bonding wires making the design more reproducible. To demonstrate the feasibility of this concept, a 2.4-GHz 2-W 2-V truly fully integrated power amplifier with 50-Ω input and output matching has been fabricated using 0.35-μm CMOS transistors. It achieves a power added efficiency (PAE) of 41 % at this power level. It can also produce 450 mW using a 1-V supply. Harmonic suppression is 64 dBc or better. This new topology makes possible a truly fully integrated watt-level gigahertz range low-voltage CMOS power amplifier for the first time.

Item Type:Article
Related URLs:
URLURL TypeDescription
Hajimiri, Ali0000-0001-6736-8019
Additional Information:© Copyright 2002 IEEE. Reprinted with permission. Manuscript received July 23, 2001; revised October 19, 2001. [Posted online: 2002-08-07] This work was supported in part by the Lee Center for Advanced Networking, Intel Corporation, the Army Research Office, Jet Propulsion Laboratory, Infineon, and the National Science Foundation. The authors would like to thank Conexant Systems for chip fabrication, particularly R. Magoon, F. In’tveld, J. Powell, A. Vo, and K. Moye. K. Potter, D. Ham, and H. Wu of Caltech deserve special thanks for their assistance. The technical support for CAD tools from Agilent Technologies and Sonnet Software, Inc. are also appreciated.
Subject Keywords:Circular geometry, CMOS analog integrated circuit, distributed active transformer, double differential, harmonic control, impedance transformation, low voltage, power amplifier, power combining
Issue or Number:3
Record Number:CaltechAUTHORS:AOKieeejssc02
Persistent URL:
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:1824
Deposited By: Archive Administrator
Deposited On:20 Feb 2006
Last Modified:08 Nov 2021 19:42

Repository Staff Only: item control page