Hashemi, Hossein and Guan, Xiang and Hajimiri, Ali (2004) A Fully Integrated 24GHz 8-Path Phased-Array Receiver in Silicon. In: 2004 IEEE International Solid-State Circuits Conference, Digest of Technical Papers. ISSCC Digest of Technical Papers. Vol.47. IEEE , Piscataway, NJ, pp. 390-391. ISBN 0-7803-8267-6. https://resolver.caltech.edu/CaltechAUTHORS:20110920-115356193
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Abstract
A fully integrated 8-channel phased-array receiver at 24 GHz is demonstrated. Each channel achieves a gain of 43 dB, noise figure of 8 dB, and an IIP3 of -11dBm, consuming 29 mA of current from a 2.5 V supply. The 8-channel array has a beam-forming resolution of 22.5°, a peak-to- ratio of 20 dB (4-bits), a total array gain of 61 dB, and improves the signal-to-noise ratio by 9 dB.
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| Additional Information: | © 2004 IEEE. Issue Date: 15-19 Feb. 2004; Date of Current Version: 13 September 2004. | |||||||||
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| Series Name: | ISSCC Digest of Technical Papers | |||||||||
| DOI: | 10.1109/ISSCC.2004.1332758 | |||||||||
| Record Number: | CaltechAUTHORS:20110920-115356193 | |||||||||
| Persistent URL: | https://resolver.caltech.edu/CaltechAUTHORS:20110920-115356193 | |||||||||
| Official Citation: | Hashemi, H.; Guan, X.; Hajimiri, A.; , "A fully integrated 24 GHz 8-path phased-array receiver in silicon," Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International , vol., no., pp. 390- 534 Vol.1, 15-19 Feb. 2004 doi: 10.1109/ISSCC.2004.1332758 | |||||||||
| Usage Policy: | No commercial reproduction, distribution, display or performance rights in this work are provided. | |||||||||
| ID Code: | 25368 | |||||||||
| Collection: | CaltechAUTHORS | |||||||||
| Deposited By: | INVALID USER | |||||||||
| Deposited On: | 20 Sep 2011 22:40 | |||||||||
| Last Modified: | 09 Nov 2021 16:32 |
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