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Testing Delay-Insensitive Circuits

Martin, Alain J. and Hazewindus, Pieter J. (1990) Testing Delay-Insensitive Circuits. California Institute of Technology . (Unpublished) https://resolver.caltech.edu/CaltechCSTR:1990.cs-tr-90-17

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Use this Persistent URL to link to this item: https://resolver.caltech.edu/CaltechCSTR:1990.cs-tr-90-17

Abstract

We show that a single stuck-at fault in a non-redundant delay-insensitive circuit results in a transition either not taking place or firing prematurely, or both, during an execution of the circuit. A transition not taking place can be tested easily, as this always prevents a transition on a primary output from taking place. A premature firing can also be tested but the addition of testing points may be required to enforce the premature firing and to propagate the transition to a primary output. Hence all single stuck-at faults are testable. All test sequences can be generated from the high-level specification of the circuit. The circuits are hazard-free in normal operation and during the tests.


Item Type:Report or Paper (Technical Report)
Group:Computer Science Technical Reports
Record Number:CaltechCSTR:1990.cs-tr-90-17
Persistent URL:https://resolver.caltech.edu/CaltechCSTR:1990.cs-tr-90-17
Usage Policy:You are granted permission for individual, educational, research and non-commercial reproduction, distribution, display and performance of this work in any format.
ID Code:26732
Collection:CaltechCSTR
Deposited By: Imported from CaltechCSTR
Deposited On:25 Apr 2001
Last Modified:03 Oct 2019 03:17

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