Burns, Steven M. (1991) Performance Analysis and Optimization of Asynchronous Circuits. California Institute of Technology . (Unpublished) https://resolver.caltech.edu/CaltechCSTR:1991.cs-tr-91-01
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Use this Persistent URL to link to this item: https://resolver.caltech.edu/CaltechCSTR:1991.cs-tr-91-01
Abstract
Analytical techniques are developed to determine the performance of asynchronous digital circuits. These techniques can be used to guide the designer during the synthesis of such a circuit, leading to a high-performance, efficient implementation. Optimization techniques are also developed that further improve this implementation by determining the optimal sizes of the low-level devices (CMOS transistors) that compose the circuit.
Item Type: | Report or Paper (Technical Report) |
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Group: | Computer Science Technical Reports |
Record Number: | CaltechCSTR:1991.cs-tr-91-01 |
Persistent URL: | https://resolver.caltech.edu/CaltechCSTR:1991.cs-tr-91-01 |
Usage Policy: | You are granted permission for individual, educational, research and non-commercial reproduction, distribution, display and performance of this work in any format. |
ID Code: | 26735 |
Collection: | CaltechCSTR |
Deposited By: | Imported from CaltechCSTR |
Deposited On: | 25 Apr 2001 |
Last Modified: | 03 Oct 2019 03:17 |
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