Papadantonakis, Karl (2001) A Theory of Constant Et^2 CMOS Circuits. California Institute of Technology , Pasadena, CA. (Unpublished) https://resolver.caltech.edu/CaltechCSTR:2001.004
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Abstract
In a digital CMOS circuit, used digitally, the dynamic energy consumption of a single pulldowm state has the form CV^2, while the current i is kV^2, and the delay t is CV/i, where C is an output capacitance, V is the supply voltage, and k is a transconductance parameter.
| Item Type: | Report or Paper (Technical Report) |
|---|---|
| Additional Information: | © 2001 California Institute of Technology. Endless help from and consultation with my advisor, Alain Martin. Additional helpful comments from Mika Nyström and Martin Rem. |
| Group: | Computer Science Technical Reports, Caltech Asynchronous VLSI Group |
| Subject Keywords: | energy efficiency Et^2 CMOS circuits VLSI voltage scaling delay ODE |
| DOI: | 10.7907/Z9610X9M |
| Record Number: | CaltechCSTR:2001.004 |
| Persistent URL: | https://resolver.caltech.edu/CaltechCSTR:2001.004 |
| Usage Policy: | You are granted permission for individual, educational, research and non-commercial reproduction, distribution, display and performance of this work in any format. |
| ID Code: | 26903 |
| Collection: | CaltechCSTR |
| Deposited By: | Imported from CaltechCSTR |
| Deposited On: | 27 Sep 2001 |
| Last Modified: | 03 Oct 2019 03:19 |
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