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Design of the Mosaic Element

Lutz, Chris and Rabin, Steve and Seitz, Charles L. and Speck, Don (1983) Design of the Mosaic Element. California Institute of Technology . (Unpublished) https://resolver.caltech.edu/CaltechCSTR:1983.5093-tr-83

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Use this Persistent URL to link to this item: https://resolver.caltech.edu/CaltechCSTR:1983.5093-tr-83

Abstract

The Mosaic element is a fast single chip computer designed to be used in groups for concurrent computation experiments. Each element contains a 16-bit processor, read-write storage, read-only store for a small initialization and bootstrap loading program and four output ports. The Mosaic processor, a highly structured design that achieves very good performance and density through innovations in its microcode, circuit techniques, and layout, is described in detai1.


Item Type:Report or Paper (Technical Report)
Group:Computer Science Technical Reports
Record Number:CaltechCSTR:1983.5093-tr-83
Persistent URL:https://resolver.caltech.edu/CaltechCSTR:1983.5093-tr-83
Usage Policy:You are granted permission for individual, educational, research and non-commercial reproduction, distribution, display and performance of this work in any format.
ID Code:27000
Collection:CaltechCSTR
Deposited By: Imported from CaltechCSTR
Deposited On:07 Aug 2002
Last Modified:03 Oct 2019 03:19

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