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A notation for designing restoring logic circuitry in CMOS

Rem, Martin and Mead, Carver (1981) A notation for designing restoring logic circuitry in CMOS. Computer Science Technical Reports, 1981.4600. Callifornia Institute of Technology , Pasadena, CA. (Unpublished) http://resolver.caltech.edu/CaltechCSTR:1981.4600-tr-81

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Abstract

We introduce a programming notation in which every syntactically correct program specifies a restoring logic component, i.e., a component whose outputs are permanently connected, via "not too many" transistors, to the power supply. It is shown how the specified components can be translated into transistor diagrams for CMOS integrated circuits. As these components are designed as strict hierarchies, it is hoped that the translation of the transistor diagrams into layouts for integrated circuits can be accomplished mechanically.


Item Type:Report or Paper (Technical Report)
Additional Information:Copyright, California Institute of Technology, 1981. The research described in this paper was sponsored by the Defense Advanced Research Projects Agency, ARPA Order Number 3771, and monitored by the Office of Naval Research under contract number N00014-79-C-0597.
Group:Computer Science Technical Reports
Funders:
Funding AgencyGrant Number
Defense Advanced Research Project Agency (DARPA)3771
Office of Naval Research (ONR)N00014-79-C-0597
Record Number:CaltechCSTR:1981.4600-tr-81
Persistent URL:http://resolver.caltech.edu/CaltechCSTR:1981.4600-tr-81
Usage Policy:You are granted permission for individual, educational, research and non-commercial reproduction, distribution, display and performance of this work in any format.
ID Code:27087
Collection:CaltechCSTR
Deposited By: Imported from CaltechCSTR
Deposited On:06 Jun 2008
Last Modified:12 Mar 2018 23:09

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