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A 24GHz CMOS Front-end

Guan, Xiang and Hajimiri, Ali (2002) A 24GHz CMOS Front-end. In: Proceedings of the 28th European Solid-State Circuits Conference. IEEE , Bologna, Italy, p. 155. ISBN 249421266.

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This paper reports the first 24GHz 0.18-µm CMOS front-end. It down-converts an RF input at 24GHz range to an IF of 5GHz range with a power gain of 27.5dB and an overall noise figure of 7.7dB. It achieves an input return loss, S_(11) of -21dB drawing 43mA from a 1.5V supply. The LNA achieves a voltage gain of 22dB and a noise figure of 6dB consuming 16mA of dc current. This performance is achieved through an analysis of the LNA showing that the NF and gain of the common-gate stage scale more gracefully with frequency and hence it is the topology of choice for very high frequency front-ends.

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URLURL TypeDescription*%26filter%3DAND%28NOT%284283010803%29%29%26searchField%3DSearch+All%26queryText%3DA+24GHz+CMOS+Front-end+2002PublisherUNSPECIFIED
Hajimiri, Ali0000-0001-6736-8019
Additional Information:© 2002 IEEE. Date of Current Version: 01 August 2005. The authors would like to thank Conexant Systems for fabrication of the front-end in their sbc18 process. They are grateful for the support of Lee Center, NSF-ERC and NSF. They are especially grateful for the help and advice of M. Racanelli, S. Stetson and A. Karroy of Conexant, H. Hashemi, H. Wu, D. Lu, D. Ham, I. Aoki, S. Kee, L. Cheung, B. Analui, and A. Natarajan of Caltech.
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Caltech Lee Center for Advanced NetworkingUNSPECIFIED
Record Number:CaltechAUTHORS:20111103-080251094
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Official Citation:Xiang Guan; Hajimiri, A.; , "A 24GHz CMOS front-end," Solid-State Circuits Conference, 2002. ESSCIRC 2002. Proceedings of the 28th European , vol., no., pp.155-158, 24-26 Sept. 2002 URL:
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:27599
Deposited By: Ruth Sustaita
Deposited On:03 Nov 2011 15:56
Last Modified:09 Mar 2020 13:18

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