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Low-Effort Specification Debugging and Analysis

Ehlers, Rüdiger and Raman, Vasumathi (2014) Low-Effort Specification Debugging and Analysis. In: 3rd Workshop on Synthesis (EPTCS 157), 23-24 July 2014, Vienna, Austria. https://resolver.caltech.edu/CaltechAUTHORS:20141209-144837376

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Abstract

Reactive synthesis deals with the automated construction of implementations of reactive systems from their specifications. To make the approach feasible in practice, systems engineers need effective and efficient means of debugging these specifications. In this paper, we provide techniques for report-based specification debugging, wherein salient properties of a specification are analyzed, and the result presented to the user in the form of a report. This provides a low-effort way to debug specifications, complementing high-effort techniques including the simulation of synthesized implementations. We demonstrate the usefulness of our report-based specification debugging toolkit by providing examples in the context of generalized reactivity(1) synthesis.


Item Type:Conference or Workshop Item (Paper)
Related URLs:
URLURL TypeDescription
http://arxiv.org/abs/1407.5399arXivArticle
http://arxiv.org/html/1407.4937arXivConference Proceedings
Additional Information:V. Raman is supported by TerraSwarm, one of six centers of STARnet, a Semiconductor Research Corporation program sponsored by MARCO and DARPA.
Funders:
Funding AgencyGrant Number
TerraSwarmUNSPECIFIED
STARnetUNSPECIFIED
Microelectronics Advanced Research Corporation (MARCO)UNSPECIFIED
Defense Advanced Research Projects Agency (DARPA)UNSPECIFIED
Record Number:CaltechAUTHORS:20141209-144837376
Persistent URL:https://resolver.caltech.edu/CaltechAUTHORS:20141209-144837376
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:52514
Collection:CaltechAUTHORS
Deposited By: Ruth Sustaita
Deposited On:10 Dec 2014 00:01
Last Modified:03 Oct 2019 07:43

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