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Winner-Take-All Networks of O(N) Complexity

Lazzaro, J. and Ryckebusch, S. and Mahowald, M. A. and Mead, C. A. (1989) Winner-Take-All Networks of O(N) Complexity. In: Advances in Neural Information Processing Systems. Vol.1. Morgan Kaufmann Publishers , San Mateo, CA, pp. 703-711. ISBN 1558600159. https://resolver.caltech.edu/CaltechAUTHORS:20141212-145244773

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Abstract

We have designed, fabricated, and tested a series of compact CMOS integrated circuits that realize the winner-take-all function. These analog, continuous-time circuits use only O(n) of interconnect to perform this function. We have also modified the winner-take-all circuit, realizing a circuit that computes local nonlinear inhibition.


Item Type:Book Section
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http://papers.nips.cc/paper/151-winner-take-all-networks-of-on-complexity.pdfOrganizationArticle
Additional Information:© 1989 Morgan Kaufmann. John Platt, John Wyatt, David Feinstein, Mark Bell, and Dave Gillespie provided mathematical insights in the analysis of the circuit. Lyn Dupre proofread the document. We thank Hewlett-Packard for computing support, and DARPA and MOSIS for chip fabrication. This work was sponsored by the Office of Naval Research and the System Development Foundation.
Funders:
Funding AgencyGrant Number
Hewlett-PackardUNSPECIFIED
Defense Advanced Research Projects Agency (DARPA)UNSPECIFIED
MOSISUNSPECIFIED
Office of Naval Research (ONR)UNSPECIFIED
System Development FoundationUNSPECIFIED
Record Number:CaltechAUTHORS:20141212-145244773
Persistent URL:https://resolver.caltech.edu/CaltechAUTHORS:20141212-145244773
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:52787
Collection:CaltechAUTHORS
Deposited By: Kristin Buxton
Deposited On:18 Dec 2014 00:44
Last Modified:03 Oct 2019 07:44

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