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Implementing neural architectures using analog VLSI circuits

Maher, Mary Ann C. and DeWeerth, Stephen P. and Mahowald, Misha A. and Mead, Carver A. (1989) Implementing neural architectures using analog VLSI circuits. IEEE Transactions on Circuits and Systems, 36 (5). pp. 643-652. ISSN 0098-4094. doi:10.1109/31.31311. https://resolver.caltech.edu/CaltechAUTHORS:20141218-114458819

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Abstract

Analog very large-scale integrated (VLSI) technology can be used not only to study and simulate biological systems, but also to emulate them in designing artificial sensory systems. A methodology for building these systems in CMOS VLSI technology has been developed using analog micropower circuit elements that can be hierarchically combined. Using this methodology, experimental VLSI chips of visual and motor subsystems have been designed and fabricated. These chips exhibit behavior similar to that of biological systems, and perform computations useful for artificial sensory systems.


Item Type:Article
Related URLs:
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http://dx.doi.org/10.1109/31.31311DOIArticle
http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=31311PublisherArticle
Additional Information:© Copyright 1989 IEEE. Manuscript received July 10, 1988; revised January 23, 1989. This paper was recommended by Guest Editors R. W. Newcomb and N. El-Leithy. IEEE Log Number 8826919.
Issue or Number:5
DOI:10.1109/31.31311
Record Number:CaltechAUTHORS:20141218-114458819
Persistent URL:https://resolver.caltech.edu/CaltechAUTHORS:20141218-114458819
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:53026
Collection:CaltechAUTHORS
Deposited By:INVALID USER
Deposited On:18 Dec 2014 19:51
Last Modified:10 Nov 2021 19:47

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