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A CMOS VLSI cochlea

Lyon, Richard F. and Mead, Carver A. (1988) A CMOS VLSI cochlea. In: 1988 International Conference on Acoustics, Speech, and Signal Processing, ICASSP-88. Vol.4. IEEE , Piscataway, NJ, pp. 2172-2175. http://resolver.caltech.edu/CaltechAUTHORS:20141222-151200537

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Abstract

An engineered system that hears, such as a speech recognizer, can be designed by modeling the cochlea, or inner ear, and higher levels of the auditory nervous system. To be useful in such a system, a model of the cochlea should incorporate a variety of known effects, such as an asymmetric lowpass/bandpass response at each output channel, a short ringing time, and active adaptation to a wide range of input signal levels. An analog electronic cochlea has been built in CMOS VLSI technology using micropower techniques to achieve this goal of usefulness via realism. The key point of the model and circuit is that a cascade of simple, nearly linear, second-order filter stages with controllable Q parameters suffices to capture the physics of the fluid-dynamic traveling-wave system in the cochlea, including the effects of adaptation and active gain involving the outer hair cells. Measurements on the test chip suggest that the circuit matches both the theory and observations from real cochleas.


Item Type:Book Section
Related URLs:
URLURL TypeDescription
http://dx.doi.org/10.1109/ICASSP.1988.197063DOIArticle
http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=197063PublisherArticle
Additional Information:© Copyright 1988 IEEE.
Record Number:CaltechAUTHORS:20141222-151200537
Persistent URL:http://resolver.caltech.edu/CaltechAUTHORS:20141222-151200537
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:53117
Collection:CaltechAUTHORS
Deposited By: Kristin Buxton
Deposited On:23 Dec 2014 17:08
Last Modified:23 Dec 2014 17:08

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