An Integer Based Hierarchical Representation for VLSI

Abstract

Geometries with 45° line segments are often used in integrated circuit layouts, since they can save considerable area. In the limit, the introduction of 45° lines is only 5% less dense than optimal geometry, i.e. circular geometry, whereas manhattan geometry is 27% less dense [7]. Obviously any actual design cannot make use of this density factor everywhere - but figure 1 illustrates a simple but common routing problem where the introduction of 45° wires substantially reduces the area. There has been a trend towards strict manhattan geometries in recent years, however, since it is commonly believed that design rule checking is complicated by the inclusion of intermediate angles [11, 1, 3, 6]. This paper describes a hierarchical representation that supports a complete circuit description, but restricts the set of allowable lines to be horizontal, vertical and 45°. Points are constrained to lie on an integer grid. Rather than use arbitrary polygons, transistors and connection wires are constructed from paths whose sides and ends are created from an octagonal circle approximation. The geometry for contacts is octagonal and is generated from the same circle approximation. The integer grid and restricted line styles allow the simplification of all the Geometrical Design Rule (GDR) checking algorithms - for example a square root is not required in the point-point distance calculations, and division is never required. In fact this approach requires less computation than typical manhattan systems. All of the calculations that normally require real number representation are expressed in integers, eliminating any possibility of round-off errors.