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Continuous-time adaptive delay system

Liu, Shih-Chii and Mead, Carver (1994) Continuous-time adaptive delay system. In: 1994 IEEE International Symposium on Circuits and Systems, 1994. ISCAS '94. Vol.4. IEEE , Piscataway, NJ, pp. 119-122. ISBN 0-7803-1915-X.

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We have developed an adaptive delay system that adjusts the delay of a delay element so that it matches the temporal disparity between the onset of two input signals. The delay is controlled either by an external bias voltage, or by an intrinsic signal derived from an adaptive block. The operation of the adaptive delay system is similar to that of a charge-pump phase-lock loop, with an extended lock-in range of more than 5 decades. Standard CMOS transistors are used in their subthreshold region. Experimental results from circuits fabricated in 2 μm CMOS technology are in agreement with the analysis

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Additional Information:© 1994 IEEE. I would like to acknowledge Kwabena Boahen for multiple discussions during the development of this design; Tobi Delbruck, Dick Lyon and Rahul Sarpeshkar for insights and editorial inputs. I would also like to acknowledge the MOSIS foundation for the fabrication of this circuit.
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Official Citation:Shih-Chii Liu; Mead, C., "Continuous-time adaptive delay system," Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on , vol.4, no., pp.119,122 vol.4, 30 May-2 Jun 1994 doi: 10.1109/ISCAS.1994.409212 URL:
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:53622
Deposited By: Kristin Buxton
Deposited On:13 Jan 2015 19:09
Last Modified:03 Oct 2019 07:51

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