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Single transistor learning synapse with long term storage

Hasler, Paul and Diorio, Chris and Minch, Bradley A. and Mead, Carver (1995) Single transistor learning synapse with long term storage. In: 1995 IEEE International Symposium on Circuits and Systems. ISCAS '95. Vol.3. IEEE , Piscataway, NJ, pp. 1660-1663. ISBN 0-7803-2570-2.

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We describe the design, fabrication, characterization, and modeling of an array of single transistor synapses. The single transistor synapses simultaneously perform long term weight storage, compute the product of the input and floating gate value, and update the weight value according to a hebbian or a backpropagation learning rule. The charge on the floating gate is decreased by hot electron injection with high selectivity for a particular synapse. The charge on the floating gate is increased by electron tunneling, which results in high selectivity between rows, but much lower selectivity between columns along a row. When the steady state source current is used as the representation of the weight value, both the incrementing and decrementing functions are proportional to a power of the source current.

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Additional Information:© 1995 IEEE. The work was supported by the Office of Naval Research, the Advanced Research Project Agency, and the Beckman Foundation.
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Office of Naval Research (ONR)UNSPECIFIED
Advanced Research Projects Agency (ARPA)UNSPECIFIED
Arnold and Mabel Beckman FoundationUNSPECIFIED
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Deposited On:13 Jan 2015 21:19
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