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Minimum propagation delays in VLSI

Mead, Carver and Rem, Martin (1982) Minimum propagation delays in VLSI. IEEE Journal of Solid-State Circuits, 17 (4). pp. 773-775. ISSN 0018-9200. doi:10.1109/JSSC.1982.1051810. https://resolver.caltech.edu/CaltechAUTHORS:20150114-102708301

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Abstract

Conditions are outlined under which propagation delays in VLSI circuits can be achieved that are logarithmic in the wire lengths. These conditions are imposed by area requirements and the velocity of light.


Item Type:Article
Related URLs:
URLURL TypeDescription
http://dx.doi.org/10.1109/JSSC.1982.1051810DOIArticle
http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=1051810PublisherArticle
http://resolver.caltech.edu/CaltechAUTHORS:20150114-104916717Related ItemCorrection
Additional Information:©1982 IEEE. Manuscript received July 15, 1981. This work was supported by the Office of Naval Research under Contract N00014-76-C-0367 and by the Defense Advanced Research Agency under ARPA order number 3771, and monitored by the Office of Naval Research under Contract N00014-79-C-0597.
Funders:
Funding AgencyGrant Number
Office of Naval Research (ONR)N00014-76-C-0367
Defense Advanced Research Project Agency (DARPA)3771
Office of Naval Research (ONR)N00014-79-C-0597
Issue or Number:4
DOI:10.1109/JSSC.1982.1051810
Record Number:CaltechAUTHORS:20150114-102708301
Persistent URL:https://resolver.caltech.edu/CaltechAUTHORS:20150114-102708301
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:53695
Collection:CaltechAUTHORS
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Deposited On:14 Jan 2015 20:43
Last Modified:10 Nov 2021 20:05

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