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Pooh: A Uniform Representation For Circuit Level Designs

Whitney, Telle and Mead, Carver (1983) Pooh: A Uniform Representation For Circuit Level Designs. In: VLSI '83 : VLSI design of digital systems : proceedings of the IFIP TC 10/WG 10.5 International Conference on Very Large Scale Integration, Trondheim, Norway, 16-19 August 1983. Elsevier , New York, pp. 401-411. ISBN 0444867511. https://resolver.caltech.edu/CaltechAUTHORS:20150310-155318797

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Abstract

This paper describes a simple but general, technology independent representation for VLSI circuits which maintains connectivity, circuit schematic, and mask geometry information. A transistor level cell is represented as the interconnection of devices along with their types, sizes and placement, and the cell's typed ports. Connection is represented explicitly by shared connection points. A file of technology dependent information indicates how to implement each transistor type, interconnect type and connection point type, as well as how structure types may interact.


Item Type:Book Section
Additional Information:© 1983 IFIP.
Record Number:CaltechAUTHORS:20150310-155318797
Persistent URL:https://resolver.caltech.edu/CaltechAUTHORS:20150310-155318797
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:55691
Collection:CaltechAUTHORS
Deposited By: Kristin Buxton
Deposited On:11 Mar 2015 05:34
Last Modified:03 Oct 2019 08:07

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