Kirk, David and Fleischer, Kurt and Watts, Lloyd and Barr, Alan (1992) Constrained Optimization Applied to the Parameter Setting Problem for Analog Circuits. In: Advances in Neural Information Processing Systems 4 (NIPS 1991). Advances in Neural Information Processing Systems. No.4. Morgan Kaufmann , San Mateo, CA, pp. 789-796. ISBN 1-55860-222-4. https://resolver.caltech.edu/CaltechAUTHORS:20160121-165545839
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Abstract
We use constrained optimization to select operating parameters for two circuits: a simple 3-transistor square root circuit, and an analog VLSI artificial cochlea. This automated method uses computer controlled measurement and test equipment to choose chip parameters which minimize the difference between the actual circuit's behavior and a specified goal behavior. Choosing the proper circuit parameters is important to compensate for manufacturing deviations or adjust circuit performance within a certain range. As biologically-motivated analog VLSI circuits become increasingly complex, implying more parameters, setting these parameters by hand will become more cumbersome. Thus an automated parameter setting method can be of great value [Fleischer 90]. Automated parameter setting is an integral part of a goal-based engineering design methodology in which circuits are constructed with parameters enabling a wide range of behaviors, and are then "tuned" to the desired behaviors automatically.
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Additional Information: | © 1992 Morgan Kaufmann. Many thanks to Carver Mead for ideas, encouragement, and support for this project. Thanks also to John Lemoncheck for help getting our physical setup together. Thanks to Hewlett-Packard for equipment donation. This work was supported in part by an AT&T Bell Laboratories Ph.D. Fellowship. Additional support was provided by NSF (ASC-89-20219). All opinions, findings, conclusions, or recommendations expressed in this document are those of the author and do not necessarily reflect the views of the sponsoring agencies. | ||||||||
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Series Name: | Advances in Neural Information Processing Systems | ||||||||
Issue or Number: | 4 | ||||||||
Record Number: | CaltechAUTHORS:20160121-165545839 | ||||||||
Persistent URL: | https://resolver.caltech.edu/CaltechAUTHORS:20160121-165545839 | ||||||||
Usage Policy: | No commercial reproduction, distribution, display or performance rights in this work are provided. | ||||||||
ID Code: | 63861 | ||||||||
Collection: | CaltechAUTHORS | ||||||||
Deposited By: | INVALID USER | ||||||||
Deposited On: | 22 Jan 2016 22:25 | ||||||||
Last Modified: | 03 Oct 2019 09:32 |
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