Kruger, W. Fritz and Hasler, Paul and Minch, Bradley A. and Koch, Christof (1997) An Adaptive WTA using Floating Gate Technology. In: Advances in Neural Information Processing Systems 9 (NIPS 1996). Advances in Neural Information Processing Systems. No.9. MIT Press , Cambridge, MA, pp. 720-726. ISBN 0-262-10065-7. https://resolver.caltech.edu/CaltechAUTHORS:20160223-161112244
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Abstract
We have designed, fabricated, and tested an adaptive Winner-Take-All (WTA) circuit based upon the classic WTA of Lazzaro, et al [1]. We have added a time dimension (adaptation) to this circuit to make the input derivative an important factor in winner selection. To accomplish this, we have modified the classic WTA circuit by adding floating gate transistors which slowly null their inputs over time. We present a simplified analysis and experimental data of this adaptive WTA fabricated in a standard CMOS 2µm process.
| Item Type: | Book Section | ||||||
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| Additional Information: | © 1997 Massachusetts Institute of Technology. | ||||||
| Group: | Koch Laboratory (KLAB) | ||||||
| Series Name: | Advances in Neural Information Processing Systems | ||||||
| Issue or Number: | 9 | ||||||
| Record Number: | CaltechAUTHORS:20160223-161112244 | ||||||
| Persistent URL: | https://resolver.caltech.edu/CaltechAUTHORS:20160223-161112244 | ||||||
| Usage Policy: | No commercial reproduction, distribution, display or performance rights in this work are provided. | ||||||
| ID Code: | 64695 | ||||||
| Collection: | CaltechAUTHORS | ||||||
| Deposited By: | INVALID USER | ||||||
| Deposited On: | 24 Feb 2016 00:16 | ||||||
| Last Modified: | 03 Oct 2019 09:40 |
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