CaltechAUTHORS
  A Caltech Library Service

A 77-GHz Phased-Array Transceiver With On-Chip Antennas in Silicon: Receiver and Antennas

Babakhani, Aydin and Guan, Xiang and Komijani, Abbas and Natarajan, Arun and Hajimiri, Ali (2006) A 77-GHz Phased-Array Transceiver With On-Chip Antennas in Silicon: Receiver and Antennas. IEEE Journal of Solid-State Circuits, 41 (12). pp. 2795-2806. ISSN 0018-9200. doi:10.1109/JSSC.2006.884811. https://resolver.caltech.edu/CaltechAUTHORS:BABieeejssc06

[img]
Preview
PDF
See Usage Policy.

3MB

Use this Persistent URL to link to this item: https://resolver.caltech.edu/CaltechAUTHORS:BABieeejssc06

Abstract

In this paper, we present the receiver and the on-chip antenna sections of a fully integrated 77-GHz four-element phased-array transceiver with on-chip antennas in silicon. The receiver section of the chip includes the complete down-conversion path comprising low-noise amplifier (LNA), frequency synthesizer, phase rotators, combining amplifiers, and on-chip dipole antennas. The signal combining is performed using a novel distributed active combining amplifier at an IF of 26 GHz. In the LO path, the output of the 52-GHz VCO is routed to different elements and can be phase shifted locally by the phase rotators. A silicon lens on the backside is used to reduce the loss due to the surface-wave power of the silicon substrate. Our measurements show a single-element LNA gain of 23 dB and a noise figure of 6.0 dB. Each of the four receive paths has a gain of 37 dB and a noise figure of 8.0 dB. Each on-chip antenna has a gain of +2 dBi.


Item Type:Article
Related URLs:
URLURL TypeDescription
https://doi.org/10.1109/JSSC.2006.884811DOIUNSPECIFIED
ORCID:
AuthorORCID
Natarajan, Arun0000-0003-3648-3844
Hajimiri, Ali0000-0001-6736-8019
Additional Information:© Copyright 2006 IEEE. Reprinted with permission. Manuscript received May 3, 2006; revised September 1, 2006. [Posted online: 2006-11-20] This work was supported in part by the National Science Foundation under Grant ECS- 0239343. The authors thank DARPA’s trusted foundry program and IBM for the chip fabrication. They also appreciate valuable help from D. Rutledge, S. Weinreb, G. Rebeiz, T. Yu, Y. Wang, E. Keehr, A. Hassibi, and P. Focardi. The technical support for CAD tools from Agilent Technologies, Zeland Software Inc., Ansoft Corp., and Integrated Engineering Software is also appreciated.
Subject Keywords:BiCMOS, dielectric lens, integrated circuits, on-chip dipole antennas, phased-array, silicon germanium, surface wave
Issue or Number:12
DOI:10.1109/JSSC.2006.884811
Record Number:CaltechAUTHORS:BABieeejssc06
Persistent URL:https://resolver.caltech.edu/CaltechAUTHORS:BABieeejssc06
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:6804
Collection:CaltechAUTHORS
Deposited By: Archive Administrator
Deposited On:23 Dec 2006
Last Modified:08 Nov 2021 20:37

Repository Staff Only: item control page